For Partners

Overview

Exhibition

Join the Ecosystem Pavilion and reach approximately 1,000 of director level and above executives from our customers!!


The TSMC Open Innovation Platform® Ecosystem Forum is one-of-a-kind events that bring together the semiconductor design chain community and TSMC customer executives. The OIP Forum will feature a day long, multi-track technical presentation sessions along with an Ecosystem Pavilion that will host up to 70 member companies. The Forum provides ideal venue to build relationships with TSMC customers.

North America OIP Ecosystem Forum
Date: September 26, 2019 (Thursday)
Time: 8:00 am – 6:30 pm
Venue: Santa Clara Convention Center

The TSMC NA OIP Ecosystem Pavilion will accommodate up to 70 companies. Applications to join the Ecosystem Pavilion will be accepted beginning July 16. Space is available on a first-come, first-serve basis.

Booth size:
(A) 10'x20' booth per unit - $7,000
(B) 20'x20' booth per unit - $14,000
(C) 20'x40' booths exclusively for the Platinum and Gold Sponsors

Decoration:
(A) For 10'x20' booths: black pipe and drape for backdrop and two sides
(B) For 20'x20' booths: customized booth of your choice
(C) For 20'x40' booths: customized booth of your choice


Exhibit Details

A. The Ecosystem Pavilion (10' x 20' booth) includes:
One 10' x 20' exhibit space
Pipe and drape
Carpet
One (1) 6' draped table
Two (2) chairs
One (1) 500W outlet
One (1) waste basket
Cart service from decorating company (one-way)
Access to decorating company for materials handling (in excess of the cart service that is included with the registration), accessories, and other services – Note: these costs are not covered by TSMC

C. Exhibitor Pass:
  For each booth unit, exhibitors will receive 4 (booth staff included) complementary passes. Additional exhibitor personnel can attend for a $300 registration fee per person.

D. Booth Setup Time:

1.) 20' x 40' and 20' x 20' booths
Set-up time: Wednesday, September 25, 10:30am - 5pm
Dismantle time: Thursday, September 26, 5:30pm - 10pm

2.) 10' x 20' booths
Set-up time: Wednesday, September 25, 1pm - 5pm
Dismantle time: Thursday, September 26, 5:30pm - 10pm


Call for Paper


The technical sessions are organized along three tracks (Mobile & Automotive, High-Performance Computing & 3DIC, and IoT & RF) with a total of 30 30-minutes presentations. Your company is eligible and encouraged to submit papers to the Forum. All papers will be reviewed by a Technical Paper Review Committee and scored based on their merit and their ability to demonstrate how TSMC technology is embedded into your products or services.

Key benefits of participating in TSMC's OIP Ecosystem Forum are:
Direct and exclusive access to director-level and above executives from TSMC customers that deepens your understanding of emerging design challenges and builds key relationships
An Ecosystem Pavilion that accommodates ecosystem members enabling a more intimate dialog with TSMC customers


With increasing demands and growing complexities of circuits and systems, new challenges are ever emerging. Showcase your insights and solutions to key technical and industry issues at TSMC OIP Forums. We will feature high-quality presentations on topics including high-performance, low power, reliability, and advanced node design solutions and their applications in market segments such as high-performance computing, mobile computing, automotive and IoT.

We are seeking presentations that illustrate your experiences and customer successes with TSMC solutions, methodologies, and techniques. Priority will be given to joint papers with end customers. Submit an abstract for consideration at the 2019 Forum

Hot Topics for 2019

HPC & 3DIC Mobile & Automotive IoT & RF
5nm, 7FF/FF+, 12/16FFC
HPC Design Flows and Methodologies
Custom/AMS Design Flows
High-Speed Interface IP:
USB, PCIe, DDR, LPDDR, SerDes
AI/ML IP
5G IP
CoWoS/SoIC Design Flows
OIP VDE, Cloud Design Successes
5nm, 7FF/FF+, 12/16FFC
Mobile Design Flows and Methodologies
Low-Power Design Flows and Methodologies
Custom/AMS Design Flows
Automotive Design Methodologies
Automotive IP
AI/ML IP
5G IP
InFO/SoIC Design Flows
OIP VDE, Cloud Design Success
40ULP, 28eF, 22ULP, 22ULL
Low-Power Design Flows and Methodologies
Custom/AMS Design Flows
RF/mmWave Designs
Wearables/IoT, Edge AI
AI/ML IP
5G IP
Non-Volatile Memories
InFO Design Flows


There is no charge to present. Abstracts are due July 19, 2019. For more information about paper submissions, please contact Mr. Tom Quan at tquan@tsmc.com.


Important Paper Submission Dates:

July 19 Abstract and speaker biography submission deadline
August 12 Notification of selected abstracts
August 22 Full draft presentation slide submission due
August 29 Final presentation slides (print version) due
September 9 Final presentation slides (speech version) due
September 16-20 Mandatory presentation rehearsal


Application Form

Please go to Call for Paper Submission and fill in the form to submit the abstract and speaker bio.


The views expressed in the presentations made at this event are those of the speaker and are not necessarily those of TSMC.